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| en:ztex_boards:ztex_fpga_boards:litcoin_mining_on_fpga [2017/01/21 14:25] – [Approach 2: FPGA implementation using external RAM] stefan | en:ztex_boards:ztex_fpga_boards:litcoin_mining_on_fpga [2017/01/21 14:25] (current) – removed stefan | ||
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| - | ====== Litecoin Mining on FPGA's ====== | ||
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| - | Due to many requests for LTC mining software for ZTEX FPGA Boards I took a deeper look into the scrypt algorithm. The goal was to estimate development effort and achievable hash rates. Results are presented here. | ||
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| - | **In order to prevent confusions and questions: ZTEX does not plan to develop Litecoin mining software.** | ||
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| - | A description of the scrypt algorithm can be found at [[http:// | ||
| - | [[https:// | ||
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| - | * The PBKDF2-HMAC-SHA-256 function can be neglected here. The computations can be done parallelly to the other computations and a single 64 cycle per SHA256 transformation loop is sufficient for many scryptROMix loops | ||
| - | * Due to decencies of intermediate results each scryptROMix loop requires about 140,000 computation steps | ||
| - | * Each scryptROMix loop (or pipeline stage) requires one 128.125 KByte vector (which has to be stored in some kind of RAM) | ||
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| - | ===== Approach 1: FPGA implementation using Block RAM ===== | ||
| - | Easiest way to implement this are non-pipelined loops. Limiting factor is the amount of vectors n which fit into the block RAM. Total hash rate would be | ||
| - | < | ||
| - | f | ||
| - | r = n * --------- | ||
| - | 140,000/H | ||
| - | </ | ||
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| - | On XC6SLX150 n is 4 and estimated f is 300MHz. **Hash rate would be approximately 8.6 KH/s.** | ||
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